RT-AICHIPV3-sample
フィールド

#include <core_cm3.h>

フィールド

__IO uint32_t ISER [8]
 
uint32_t RESERVED0 [24]
 
__IO uint32_t ICER [8]
 
uint32_t RSERVED1 [24]
 
__IO uint32_t ISPR [8]
 
uint32_t RESERVED2 [24]
 
__IO uint32_t ICPR [8]
 
uint32_t RESERVED3 [24]
 
__IO uint32_t IABR [8]
 
uint32_t RESERVED4 [56]
 
__IO uint8_t IP [240]
 
uint32_t RESERVED5 [644]
 
__O uint32_t STIR
 

フィールド詳解

◆ IABR

__IO uint32_t IABR[8]

Offset: 0x200 Interrupt Active bit Register

◆ ICER

__IO uint32_t ICER[8]

Offset: 0x080 Interrupt Clear Enable Register

◆ ICPR

__IO uint32_t ICPR[8]

Offset: 0x180 Interrupt Clear Pending Register

◆ IP

__IO uint8_t IP[240]

Offset: 0x300 Interrupt Priority Register (8Bit wide)

◆ ISER

__IO uint32_t ISER[8]

Offset: 0x000 Interrupt Set Enable Register

◆ ISPR

__IO uint32_t ISPR[8]

Offset: 0x100 Interrupt Set Pending Register

◆ RESERVED0

uint32_t RESERVED0[24]

◆ RESERVED2

uint32_t RESERVED2[24]

◆ RESERVED3

uint32_t RESERVED3[24]

◆ RESERVED4

uint32_t RESERVED4[56]

◆ RESERVED5

uint32_t RESERVED5[644]

◆ RSERVED1

uint32_t RSERVED1[24]

◆ STIR

__O uint32_t STIR

Offset: 0xE00 Software Trigger Interrupt Register


この構造体詳解は次のファイルから抽出されました: