CM3 Core Definitions

CM3 Core Definitions 連携図

モジュール
	CMSIS CM3 Core Register
	CMSIS CM3 Core Function Interface
	CMSIS CM3 Core Debug Interface

マクロ定義
#define	__CM3_CMSIS_VERSION_MAIN   (0x01)
#define	__CM3_CMSIS_VERSION_SUB   (0x30)
#define	__CM3_CMSIS_VERSION   ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)
#define	__CORTEX_M   (0x03)
#define	__NVIC_PRIO_BITS   4
#define	__I   volatile const
#define	__O   volatile
#define	__IO   volatile

詳解

This file defines all structures and symbols for CMSIS core:

• CMSIS version number
• Cortex-M core registers and bitfields
• Cortex-M core peripheral base address

マクロ定義詳解

__CM3_CMSIS_VERSION

#define __CM3_CMSIS_VERSION   ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB)

CMSIS HAL version number

__CM3_CMSIS_VERSION_MAIN

#define __CM3_CMSIS_VERSION_MAIN   (0x01)

[31:16] CMSIS HAL main version

__CM3_CMSIS_VERSION_SUB

#define __CM3_CMSIS_VERSION_SUB   (0x30)

[15:0] CMSIS HAL sub version

__CORTEX_M

#define __CORTEX_M   (0x03)

Cortex core

__I

#define __I   volatile const

IO definitions

define access restrictions to peripheral registersdefines 'read only' permissions

__IO

#define __IO   volatile

defines 'read / write' permissions

__NVIC_PRIO_BITS

#define __NVIC_PRIO_BITS   4

standard definition for NVIC Priority Bits

__O

#define __O   volatile

defines 'write only' permissions