NVIC_Type 構造体

#include <core_cm3.h>

フィールド
__IO uint32_t	ISER [8]
uint32_t	RESERVED0 [24]
__IO uint32_t	ICER [8]
uint32_t	RSERVED1 [24]
__IO uint32_t	ISPR [8]
uint32_t	RESERVED2 [24]
__IO uint32_t	ICPR [8]
uint32_t	RESERVED3 [24]
__IO uint32_t	IABR [8]
uint32_t	RESERVED4 [56]
__IO uint8_t	IP [240]
uint32_t	RESERVED5 [644]
__O uint32_t	STIR

フィールド詳解

__IO uint32_t IABR

Offset: 0x200 Interrupt Active bit Register

__IO uint32_t ICER

Offset: 0x080 Interrupt Clear Enable Register

__IO uint32_t ICPR

Offset: 0x180 Interrupt Clear Pending Register

__IO uint8_t IP

Offset: 0x300 Interrupt Priority Register (8Bit wide)

__IO uint32_t ISER

Offset: 0x000 Interrupt Set Enable Register

__IO uint32_t ISPR

Offset: 0x100 Interrupt Set Pending Register

uint32_t RESERVED0

uint32_t RESERVED2

uint32_t RESERVED3

uint32_t RESERVED4

uint32_t RESERVED5

uint32_t RSERVED1

__O uint32_t STIR

Offset: 0xE00 Software Trigger Interrupt Register

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この構造体詳解は次のファイルから抽出されました:

• CMSISv1p30_LPC13xx/inc/core_cm3.h