CM3 Core Definitions 連携図

モジュール
	CMSIS CM3 Core Register

	CMSIS CM3 Core Function Interface

	CMSIS CM3 Core Debug Interface

マクロ定義
#define	__CM3_CMSIS_VERSION_MAIN (0x01)

#define	__CM3_CMSIS_VERSION_SUB (0x30)

#define	__CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) \| __CM3_CMSIS_VERSION_SUB)

#define	__CORTEX_M (0x03)

#define	__NVIC_PRIO_BITS 4

#define	__I volatile const

#define	__O volatile

#define	__IO volatile

#define	__CM3_CMSIS_VERSION_MAIN (0x01)

#define	__CM3_CMSIS_VERSION_SUB (0x30)

#define	__CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) \| __CM3_CMSIS_VERSION_SUB)

#define	__CORTEX_M (0x03)

#define	__NVIC_PRIO_BITS 4

#define	__I volatile const

#define	__O volatile

#define	__IO volatile

詳解

This file defines all structures and symbols for CMSIS core:

マクロ定義詳解

CMSIS HAL version number

CMSIS HAL version number

#define __CM3_CMSIS_VERSION_MAIN (0x01)

[31:16] CMSIS HAL main version

#define __CM3_CMSIS_VERSION_MAIN (0x01)

[31:16] CMSIS HAL main version

#define __CM3_CMSIS_VERSION_SUB (0x30)

[15:0] CMSIS HAL sub version

#define __CM3_CMSIS_VERSION_SUB (0x30)

[15:0] CMSIS HAL sub version

#define __CORTEX_M (0x03)

Cortex core

#define __CORTEX_M (0x03)

Cortex core

#define __I volatile const

IO definitions

define access restrictions to peripheral registersdefines 'read only' permissions

#define __I volatile const

IO definitions

define access restrictions to peripheral registersdefines 'read only' permissions

#define __IO volatile

defines 'read / write' permissions

#define __IO volatile

defines 'read / write' permissions

#define __NVIC_PRIO_BITS 4

standard definition for NVIC Priority Bits

#define __NVIC_PRIO_BITS 4

standard definition for NVIC Priority Bits

#define __O volatile

defines 'write only' permissions

#define __O volatile

defines 'write only' permissions