#include "core_cm3.h"
#include "system_LPC13xx.h"

LPC13xx.h の依存先関係図:

被依存関係図:

データ構造
struct	LPC_SYSCON_TypeDef

struct	LPC_IOCON_TypeDef

struct	LPC_PMU_TypeDef

struct	LPC_GPIO_TypeDef

struct	LPC_TMR_TypeDef

struct	LPC_UART_TypeDef

struct	LPC_SSP_TypeDef

struct	LPC_I2C_TypeDef

struct	LPC_WDT_TypeDef

struct	LPC_ADC_TypeDef

struct	LPC_USB_TypeDef

マクロ定義
#define	__MPU_PRESENT 1

#define	__NVIC_PRIO_BITS 3

#define	__Vendor_SysTickConfig 0

#define	LPC_FLASH_BASE (0x00000000UL)

#define	LPC_RAM_BASE (0x10000000UL)

#define	LPC_APB0_BASE (0x40000000UL)

#define	LPC_AHB_BASE (0x50000000UL)

#define	LPC_I2C_BASE (LPC_APB0_BASE + 0x00000)

#define	LPC_WDT_BASE (LPC_APB0_BASE + 0x04000)

#define	LPC_UART_BASE (LPC_APB0_BASE + 0x08000)

#define	LPC_CT16B0_BASE (LPC_APB0_BASE + 0x0C000)

#define	LPC_CT16B1_BASE (LPC_APB0_BASE + 0x10000)

#define	LPC_CT32B0_BASE (LPC_APB0_BASE + 0x14000)

#define	LPC_CT32B1_BASE (LPC_APB0_BASE + 0x18000)

#define	LPC_ADC_BASE (LPC_APB0_BASE + 0x1C000)

#define	LPC_USB_BASE (LPC_APB0_BASE + 0x20000)

#define	LPC_PMU_BASE (LPC_APB0_BASE + 0x38000)

#define	LPC_SSP_BASE (LPC_APB0_BASE + 0x40000)

#define	LPC_SSP0_BASE (LPC_APB0_BASE + 0x40000)

#define	LPC_IOCON_BASE (LPC_APB0_BASE + 0x44000)

#define	LPC_SYSCON_BASE (LPC_APB0_BASE + 0x48000)

#define	LPC_SSP1_BASE (LPC_APB0_BASE + 0x58000)

#define	LPC_GPIO_BASE (LPC_AHB_BASE + 0x00000)

#define	LPC_GPIO0_BASE (LPC_AHB_BASE + 0x00000)

#define	LPC_GPIO1_BASE (LPC_AHB_BASE + 0x10000)

#define	LPC_GPIO2_BASE (LPC_AHB_BASE + 0x20000)

#define	LPC_GPIO3_BASE (LPC_AHB_BASE + 0x30000)

#define	LPC_I2C ((LPC_I2C_TypeDef *) LPC_I2C_BASE )

#define	LPC_WDT ((LPC_WDT_TypeDef *) LPC_WDT_BASE )

#define	LPC_UART ((LPC_UART_TypeDef *) LPC_UART_BASE )

#define	LPC_TMR16B0 ((LPC_TMR_TypeDef *) LPC_CT16B0_BASE)

#define	LPC_TMR16B1 ((LPC_TMR_TypeDef *) LPC_CT16B1_BASE)

#define	LPC_TMR32B0 ((LPC_TMR_TypeDef *) LPC_CT32B0_BASE)

#define	LPC_TMR32B1 ((LPC_TMR_TypeDef *) LPC_CT32B1_BASE)

#define	LPC_ADC ((LPC_ADC_TypeDef *) LPC_ADC_BASE )

#define	LPC_PMU ((LPC_PMU_TypeDef *) LPC_PMU_BASE )

#define	LPC_SSP ((LPC_SSP_TypeDef *) LPC_SSP_BASE )

#define	LPC_SSP0 ((LPC_SSP_TypeDef *) LPC_SSP0_BASE )

#define	LPC_SSP1 ((LPC_SSP_TypeDef *) LPC_SSP1_BASE )

#define	LPC_IOCON ((LPC_IOCON_TypeDef *) LPC_IOCON_BASE )

#define	LPC_SYSCON ((LPC_SYSCON_TypeDef *) LPC_SYSCON_BASE)

#define	LPC_USB ((LPC_USB_TypeDef *) LPC_USB_BASE )

#define	LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE )

#define	LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )

#define	LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )

#define	LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )

型定義
typedef enum IRQn	IRQn_Type

列挙型
enum	IRQn { NonMaskableInt_IRQn = -14, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, WAKEUP0_IRQn = 0, WAKEUP1_IRQn = 1, WAKEUP2_IRQn = 2, WAKEUP3_IRQn = 3, WAKEUP4_IRQn = 4, WAKEUP5_IRQn = 5, WAKEUP6_IRQn = 6, WAKEUP7_IRQn = 7, WAKEUP8_IRQn = 8, WAKEUP9_IRQn = 9, WAKEUP10_IRQn = 10, WAKEUP11_IRQn = 11, WAKEUP12_IRQn = 12, WAKEUP13_IRQn = 13, WAKEUP14_IRQn = 14, WAKEUP15_IRQn = 15, WAKEUP16_IRQn = 16, WAKEUP17_IRQn = 17, WAKEUP18_IRQn = 18, WAKEUP19_IRQn = 19, WAKEUP20_IRQn = 20, WAKEUP21_IRQn = 21, WAKEUP22_IRQn = 22, WAKEUP23_IRQn = 23, WAKEUP24_IRQn = 24, WAKEUP25_IRQn = 25, WAKEUP26_IRQn = 26, WAKEUP27_IRQn = 27, WAKEUP28_IRQn = 28, WAKEUP29_IRQn = 29, WAKEUP30_IRQn = 30, WAKEUP31_IRQn = 31, WAKEUP32_IRQn = 32, WAKEUP33_IRQn = 33, WAKEUP34_IRQn = 34, WAKEUP35_IRQn = 35, WAKEUP36_IRQn = 36, WAKEUP37_IRQn = 37, WAKEUP38_IRQn = 38, WAKEUP39_IRQn = 39, I2C_IRQn = 40, TIMER_16_0_IRQn = 41, TIMER_16_1_IRQn = 42, TIMER_32_0_IRQn = 43, TIMER_32_1_IRQn = 44, SSP_IRQn = 45, SSP0_IRQn = 45, UART_IRQn = 46, USB_IRQn = 47, USB_FIQn = 48, ADC_IRQn = 49, WDT_IRQn = 50, BOD_IRQn = 51, RESERVED_IRQn = 52, EINT3_IRQn = 53, EINT2_IRQn = 54, EINT1_IRQn = 55, EINT0_IRQn = 56, SSP1_IRQn = 57 }

マクロ定義詳解

#define __MPU_PRESENT 1

MPU present or not

#define __NVIC_PRIO_BITS 3

Number of Bits used for Priority Levels

#define __Vendor_SysTickConfig 0

Set to 1 if different SysTick Config is used

#define LPC_ADC ((LPC_ADC_TypeDef *) LPC_ADC_BASE )

#define LPC_ADC_BASE (LPC_APB0_BASE + 0x1C000)

#define LPC_AHB_BASE (0x50000000UL)

#define LPC_APB0_BASE (0x40000000UL)

#define LPC_CT16B0_BASE (LPC_APB0_BASE + 0x0C000)

#define LPC_CT16B1_BASE (LPC_APB0_BASE + 0x10000)

#define LPC_CT32B0_BASE (LPC_APB0_BASE + 0x14000)

#define LPC_CT32B1_BASE (LPC_APB0_BASE + 0x18000)

#define LPC_FLASH_BASE (0x00000000UL)

#define LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE )

#define LPC_GPIO0_BASE (LPC_AHB_BASE + 0x00000)

#define LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )

#define LPC_GPIO1_BASE (LPC_AHB_BASE + 0x10000)

#define LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )

#define LPC_GPIO2_BASE (LPC_AHB_BASE + 0x20000)

#define LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )

#define LPC_GPIO3_BASE (LPC_AHB_BASE + 0x30000)

#define LPC_GPIO_BASE (LPC_AHB_BASE + 0x00000)

#define LPC_I2C ((LPC_I2C_TypeDef *) LPC_I2C_BASE )

#define LPC_I2C_BASE (LPC_APB0_BASE + 0x00000)

#define LPC_IOCON ((LPC_IOCON_TypeDef *) LPC_IOCON_BASE )

#define LPC_IOCON_BASE (LPC_APB0_BASE + 0x44000)

#define LPC_PMU ((LPC_PMU_TypeDef *) LPC_PMU_BASE )

#define LPC_PMU_BASE (LPC_APB0_BASE + 0x38000)

#define LPC_RAM_BASE (0x10000000UL)

#define LPC_SSP ((LPC_SSP_TypeDef *) LPC_SSP_BASE )

#define LPC_SSP0 ((LPC_SSP_TypeDef *) LPC_SSP0_BASE )

#define LPC_SSP0_BASE (LPC_APB0_BASE + 0x40000)

#define LPC_SSP1 ((LPC_SSP_TypeDef *) LPC_SSP1_BASE )

#define LPC_SSP1_BASE (LPC_APB0_BASE + 0x58000)

#define LPC_SSP_BASE (LPC_APB0_BASE + 0x40000)

#define LPC_SYSCON ((LPC_SYSCON_TypeDef *) LPC_SYSCON_BASE)

#define LPC_SYSCON_BASE (LPC_APB0_BASE + 0x48000)

#define LPC_TMR16B0 ((LPC_TMR_TypeDef *) LPC_CT16B0_BASE)

#define LPC_TMR16B1 ((LPC_TMR_TypeDef *) LPC_CT16B1_BASE)

#define LPC_TMR32B0 ((LPC_TMR_TypeDef *) LPC_CT32B0_BASE)

#define LPC_TMR32B1 ((LPC_TMR_TypeDef *) LPC_CT32B1_BASE)

#define LPC_UART ((LPC_UART_TypeDef *) LPC_UART_BASE )

#define LPC_UART_BASE (LPC_APB0_BASE + 0x08000)

#define LPC_USB ((LPC_USB_TypeDef *) LPC_USB_BASE )

#define LPC_USB_BASE (LPC_APB0_BASE + 0x20000)

#define LPC_WDT ((LPC_WDT_TypeDef *) LPC_WDT_BASE )

#define LPC_WDT_BASE (LPC_APB0_BASE + 0x04000)

型定義詳解

typedef enum IRQn IRQn_Type

列挙型詳解

enum IRQn

列挙値
NonMaskableInt_IRQn	2 Non Maskable Interrupt
MemoryManagement_IRQn	4 Cortex-M3 Memory Management Interrupt
BusFault_IRQn	5 Cortex-M3 Bus Fault Interrupt
UsageFault_IRQn	6 Cortex-M3 Usage Fault Interrupt
SVCall_IRQn	11 Cortex-M3 SV Call Interrupt
DebugMonitor_IRQn	12 Cortex-M3 Debug Monitor Interrupt
PendSV_IRQn	14 Cortex-M3 Pend SV Interrupt
SysTick_IRQn	15 Cortex-M3 System Tick Interrupt
WAKEUP0_IRQn	All I/O pins can be used as wakeup source.
WAKEUP1_IRQn	There are 40 pins in total for LPC17xx
WAKEUP2_IRQn
WAKEUP3_IRQn
WAKEUP4_IRQn
WAKEUP5_IRQn
WAKEUP6_IRQn
WAKEUP7_IRQn
WAKEUP8_IRQn
WAKEUP9_IRQn
WAKEUP10_IRQn
WAKEUP11_IRQn
WAKEUP12_IRQn
WAKEUP13_IRQn
WAKEUP14_IRQn
WAKEUP15_IRQn
WAKEUP16_IRQn
WAKEUP17_IRQn
WAKEUP18_IRQn
WAKEUP19_IRQn
WAKEUP20_IRQn
WAKEUP21_IRQn
WAKEUP22_IRQn
WAKEUP23_IRQn
WAKEUP24_IRQn
WAKEUP25_IRQn
WAKEUP26_IRQn
WAKEUP27_IRQn
WAKEUP28_IRQn
WAKEUP29_IRQn
WAKEUP30_IRQn
WAKEUP31_IRQn
WAKEUP32_IRQn
WAKEUP33_IRQn
WAKEUP34_IRQn
WAKEUP35_IRQn
WAKEUP36_IRQn
WAKEUP37_IRQn
WAKEUP38_IRQn
WAKEUP39_IRQn
I2C_IRQn	I2C Interrupt
TIMER_16_0_IRQn	16-bit Timer0 Interrupt
TIMER_16_1_IRQn	16-bit Timer1 Interrupt
TIMER_32_0_IRQn	32-bit Timer0 Interrupt
TIMER_32_1_IRQn	32-bit Timer1 Interrupt
SSP_IRQn	SSP0 Interrupt - original name
SSP0_IRQn	SSP0 Interrupt - new name
UART_IRQn	UART Interrupt
USB_IRQn	USB Regular Interrupt
USB_FIQn	USB Fast Interrupt
ADC_IRQn	A/D Converter Interrupt
WDT_IRQn	Watchdog timer Interrupt
BOD_IRQn	Brown Out Detect(BOD) Interrupt
RESERVED_IRQn	Reserved Interrupt
EINT3_IRQn	External Interrupt 3 Interrupt
EINT2_IRQn	External Interrupt 2 Interrupt
EINT1_IRQn	External Interrupt 1 Interrupt
EINT0_IRQn	External Interrupt 0 Interrupt
SSP1_IRQn	SSP1 Interrupt

データ構造

マクロ定義

型定義

列挙型

マクロ定義詳解

型定義詳解

列挙型詳解